Workshop on VLSI Circuit Design
Start Date: August 04, 2025
End Date: August 06, 2025
The Department of Electronics & Communication Engineering − VLSI Group at MIT Bengaluru organized a three-day workshop on “VLSI Circuit Design” from 4th to 6th August 2025. The event witnessed enthusiastic participation from 50 students across the BTech ECE, ECM, and VLSI programs, who gained valuable insights into industry-relevant topics.
The workshop featured expert sessions by industry professionals: Mr. K.S. Sainarayan, Mr. Krishna Patil, and Mr. Shourya Shukla from Marvell Semiconductor India Pvt. Ltd., Mr. Shekar Jha from Analog Devices India Pvt. Ltd., Mr. Sitaram Banda from Renesas Electronics, and Mr. Ramadas M from Ventana Microsystems. These resource persons shared their extensive industry experience, greatly enriching the learning experience for the participants.
Key topics covered during the workshop included EDA Tools, Design Verification, Testing and Testability, Physical Design, and Analog Design.
The inaugural session was graced by Dr. Iven Jose, Director of MIT Bengaluru, and Dr. S. Ramasamy, Head of the ECE Department. The valedictory session was graced by Dr. S.B. Boregowda, Deputy Registrar (Academics), MAHE Manipal.
The workshop was coordinated by Dr. Balachandra Achar, Dr. Rashmi K M, Dr. Bharath Srinivasulu, Dr. Valasa Sresta, and Dr. Himakshi Mishra, with support from student volunteers Palash, Swaminath, Sreelakshmi, Priyam, and Bhoomi.


